Lightnews — Scholar-powered news

Reposted by Rohan makes RTL on FPGA 🛠️

Tim 'mithro' Ansell @mith.ro · 12d

Leo Moser and myself will be on @crowdsupply.bsky.social 's Teardown Session talking with @helenleigh.bsky.social about
@wafer.space this Thursday (3rd October) - youtu.be/tEOmnN8IAjs

Teardown Session 56: wafer.space with Tim Ansell

YouTube video by Crowd Supply

youtu.be

1 6 12

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · 11d

this ryt? ku-fpg.github.io/software/kan...

I'll try this. It's more mature I guess?

Kansas Lava

The Functional Programming Group at the University of Kansas applies and extends functional programming technologies to the diverse areas of building computer systems, high-performance computing, info...

ku-fpg.github.io

1

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · 12d

We already have chisel for this right? or it lacks on something that only Haskell can provide?

1

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · 13d

FYI : Original electronic diary was invented by a Indian guy known as Satyan Pitroda, alias Sam Pitroda.

He may be a tad racist, but a great guy. I mean all Indians are racist to each other, who cares.

www.computerhistory.org/revolution/m...

Reposted by Rohan makes RTL on FPGA 🛠️

Tim 'mithro' Ansell @mith.ro · 16d

It was awesome to be on @chrisgammell.bsky.social 's Amp Hour podcast again. Find out more about my latest endeavor to make custom silicon manufacturing accessible and follow @wafer.space and bookmark wafer.space to keep up to date!

Chris Gammell @chrisgammell.bsky.social · 16d

What happens when one of the main providers that enables #opensource #silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more:

theamphour.com/703-building...

1 3 5

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · 16d

It can be powered directly from a Pi USB port
with 60% brightness. It needs a external supply for 100% brightness.

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · 25d

it's ROM generated from ROM compiler.

*This is the one for storing TV codes for that IR LED project

*and not the atari one

1 2

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Sep 11

There is one Open Z80 implementation by @renaldas.bsky.social on TT07.

www.tinytapeout.com/chips/tt07/t...

259 Zilog Z80 - Tiny Tapeout

Z80 open-source silicon. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

www.tinytapeout.com

1 2

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Sep 6

yeah, openroad STA gives you a rough estimate for power.

It's a static power estimation obviously. Also it's a digital tapeout, so I don't expect it to be a very power hungry design (assuming SKY130A cells are optimized).

1

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Sep 6

Low power math within few clock cycles.

Imagine it, then put it into silicon.

Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks.

Check - t.co/vBGGA2i0uX

Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.

1 5 12

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Aug 14

or get a TT board and learn fpga and design asic as well.
bsky.app/profile/roha...

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Aug 10

SPI-slave device for seven-segment display on TT base board.

TT FPGA controls seven-segment display via spi-slave and the RP2040 just sends it a 6-bit message to light up the LEDs.

2 1

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Aug 10

SPI-slave device for seven-segment display on TT base board.

TT FPGA controls seven-segment display via spi-slave and the RP2040 just sends it a 6-bit message to light up the LEDs.

2

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Aug 7

LMAO
Come for India and you'll get a bloody nose.

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Aug 5

The clock looks so beautiful because it's right from FPGA!!

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Aug 5

ASICs are cool.
FPGAs are ❤️.

FPGA brother to tinytapeout ASIC by Michael Bell aka @rebelmike.bsky.social

@tinytapeout.com @mattvenn.net @urishaked.bsky.social

1 2 10

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Aug 4

Definitely true!

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Jul 28

Evening chai is hot enough to give the FPGA a first-class ticket to the electronic afterlife.

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Jul 27

...and beautiful waveforms

1

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Jul 27

When man craves for aesthetics, he craves for God...and good quality probes.

1

Reposted by Rohan makes RTL on FPGA 🛠️

Hackaday @hackadayofficial.bsky.social · Jul 22

2025 One Hertz Challenge: A 555, but not as we know it

Hackaday Article

hackaday.com

3 3

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Jul 22

TP5 should always be 2.5v right?

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Jul 22

Oops, I'm getting 0.5v on TP5.

I'll try replacing that LDO.

1

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Jul 22

FYI CONFIG_PROGRAMN pin is high, since configuration never really began. When I do ecp_prog.execute() It goes low for a fraction of sec then high back again.

And after uploading blinky, I should observe 2.5v on TP5, right ?
bsky.app/profile/roha...

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Jul 22

yeah, I'm getting 3v3, gnd and gnd on R4,R5 and R6. I'm reading 10K ohm on all of them, so they're not burned out either.

I guess something is messed up with power sequence.

Is there any difference in RP2040 base board between TT07 and TT06 ?

2 1

Reposted by Rohan makes RTL on FPGA 🛠️

Matt Venn @mattvenn.net · Jul 21

Join me today on the #opensourcesiliconstream to catch up on the latest news and then make a simple quadrature encoder peripheral for the @tinytapeout.com RISC-V competition!

www.youtube.com/live/2JTFwLV...

Open Source Silicon Stream #18 - Quadrature Encoder RISC-V peripheral

Join the stream for latest news in open source silicon, followed by some hacking on a quadrature encoder peripheral for the Tiny Tapeout RISC-V competition. https://docs.google.com/document/d/197sZCd...

www.youtube.com

1 4 9