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wafer.space

@wafer.space

49 followers 94 following 3 posts

https://wafer.space - Budget silicon manufacturing, create integrated circuits without breaking the bank! $7k USD for 1,000 die of ~20mm2 of GF180MCU (open source) silicon.

wafer.space

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wafer.space @wafer.space · 7d

This live stream starts in a few hours!

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wafer.space @wafer.space · 7d

Would love to know what your MVP criteria was!

Reposted by wafer.space

TinyTapeout @tinytapeout.com · 8d

It’s great to see people using our service to test bigger mixed signal designs like OpenRAM. In this test, Jesse put a tiny 16x32 RAM inside a 4 tile digital design.

tinytapeout.com/chips/ttsky2...

454 Single Port OpenRAM Testchip - Tiny Tapeout

Testchip of single port SRAM macro using two phase clocking

tinytapeout.com

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Reposted by wafer.space

TinyTapeout @tinytapeout.com · 8d

We have our first commissioned art from @bleeptrack.de , “Cross Stitch Creatures” - the first of 4 in a series exploring silicon art.

tinytapeout.com/chips/ttsky2...

871 Cross stitch Creatures #2 - Tiny Tapeout

generative pattern creatures using silicon cross stitch

tinytapeout.com

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Reposted by wafer.space

TinyTapeout @tinytapeout.com · 8d

Mitch Altman has long inspired us, and as a tribute we included an ASIC version of his classic TV-B-Gone universal off button for TVs. We also took the opportunity to test Sylvain Munalt’s ROM.

tinytapeout.com/chips/ttsky2...

462 TV-B-Gone-EU (ROM Macro variant) - Tiny Tapeout

TV-B-Gone shuts down many TVs by sending IR codes

tinytapeout.com

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Reposted by wafer.space

TinyTapeout @tinytapeout.com · 8d

Inspired by Peter Kinget, we commissioned Andrew Kang to create a Mini MOSBius especially for us. The idea is to enable analog designers to get faster feedback on their circuit designs with an analog FPGA.

tinytapeout.com/chips/ttsky2...

490 mini mosbius - Tiny Tapeout

a mosbius style chip in a 3x2 tt slot

tinytapeout.com

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Reposted by wafer.space

TinyTapeout @tinytapeout.com · 8d

It was the first time we enabled 4 tile high designs, enabling a monster crowd sourced RISC-V microcontroller competition called Asteroid. At 60k standard cells, this is the biggest design so far on Tiny Tapeout.

tinytapeout.com/chips/ttsky2...

495 TinyQV 'Asteroids' - Crowdsourced Risc-V SoC - Tiny Tapeout

A Risc-V SoC with peripherals from the Tiny Tapeout Risc-V challenge, codename 'Asteroids'

tinytapeout.com

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Reposted by wafer.space

TinyTapeout @tinytapeout.com · 8d

We just packed 237 of your projects into our most packed ASIC to date and submitted it for manufacture. Let’s take a look inside…

floorplan of the latest TT ASIC multi project chip

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Reposted by wafer.space

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · 29d

There is one Open Z80 implementation by @renaldas.bsky.social on TT07.

www.tinytapeout.com/chips/tt07/t...

259 Zilog Z80 - Tiny Tapeout

Z80 open-source silicon. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

www.tinytapeout.com

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Reposted by wafer.space

Tim 'mithro' Ansell @mith.ro · 28d

Depends on the demand. I would like to get to once a month but once a quarter will probably be the initial frequency.

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Reposted by wafer.space

Tim 'mithro' Ansell @mith.ro · 10d

Leo Moser and myself will be on @crowdsupply.bsky.social 's Teardown Session talking with @helenleigh.bsky.social about
@wafer.space this Thursday (3rd October) - youtu.be/tEOmnN8IAjs

Teardown Session 56: wafer.space with Tim Ansell

YouTube video by Crowd Supply

youtu.be

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wafer.space @wafer.space · 14d

@mith.ro was interviewed by @chrisgammell.bsky.social about the @wafer.space service!

Find out more at wafer.space!

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Reposted by wafer.space

Chris Gammell @chrisgammell.bsky.social · 14d

What happens when one of the main providers that enables #opensource #silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more:

theamphour.com/703-building...

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Reposted by wafer.space

Rohan makes RTL on FPGA 🛠️ @rohan-devarc.bsky.social · Sep 6

Low power math within few clock cycles.

Imagine it, then put it into silicon.

Made by Vicharak aka @aksharvastarpara.bsky.social 's team and two FPGA freaks.

Check - t.co/vBGGA2i0uX

Thanks @mattvenn.net and @urishaked.bsky.social and whole @tinytapeout.com team for making this possible.

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Reposted by wafer.space

johndmcmaster.bsky.social @johndmcmaster.bsky.social · May 4

Great meeting Mohamed Kassem at Latch-Up conference! Excited to watch ChipFoundry pick up the torch to enable SkyWater shuttle runs

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