Griffin
griffffin.bsky.social
Griffin
@griffffin.bsky.social
I see every frame, at least most of the time.
July 18, 2025 at 2:56 AM
1 2 3 4 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 60
So every other except from 1-4 and 60-1
July 18, 2025 at 2:53 AM
Luxury! Remember when your protractor, compass, ruler, and pencil could be badgered into creating dither filled, clipped polygons on cartridge paper only to be manually transferred to tracing paper to allow for contact print duplication via cyanotype!
May 30, 2025 at 11:38 PM
oof ...Reading the headline thinking it was going to say "Mark Zuckerberg Thinks You Don't Have Enough Friends and His New Social Platform Is the Answer" but then the actual headline being horrifically worse.
May 3, 2025 at 1:47 AM
At first I read this as "if you use LLVM to generate code" and was like wow that is extreme, imagining reading the asm for everything xD
March 17, 2025 at 6:06 AM
This is super fun to play with! Also just found if you show the advanced panel you can change the mode (to like Dorian, etc..) which opens up a bunch more possibilities.
January 28, 2025 at 2:00 AM
That would be awesome!!
January 26, 2025 at 5:31 PM
And there's no SRC. It's synced with PTPv2
December 1, 2024 at 8:26 AM
It's proprietary but given what Dante and AES67 do I would guess it's a 16 or 32 sample window at 48kHz
December 1, 2024 at 8:25 AM
And that latency is fixed regardless of what the processing chain is in the DSP.
November 30, 2024 at 8:05 PM
Was just referring to Dante to show the scale of channel counts. Re: latency, for one example QSC QSYS uses x86 and has a latency of 3.167ms from any analog input to any analog output across up to 5 switch hops from analog input to DSP and another 5 from DSP to output, including A/D, D/A conversion.
November 30, 2024 at 8:02 PM
Lots of large scale professional stuff (512x512 Dante, etc...) where SHARC is too slow has moved to either x86 on RT kernel or FPGA.
November 30, 2024 at 9:59 AM