@oscardssmith.bsky.social
Reposted
If you work in controls, you know: write C code for real-time embedded hardware. You can't use #python or #rstats etc. for that, right? With #julialang v1.12, we demonstrate it's possible to ahead of time compile to small binaries for use in controls applications. #sciml
arxiv.org/abs/2502.01128
arxiv.org/abs/2502.01128
C-code generation considered unnecessary: go directly to binary, do not pass C. Compilation of Julia code for deployment in model-based engineering
Since time immemorial an old adage has always seemed to ring true: you cannot use a high-level productive programming language like Python or R for real-time control and embedded-systems programming, ...
arxiv.org
February 6, 2025 at 1:58 PM
If you work in controls, you know: write C code for real-time embedded hardware. You can't use #python or #rstats etc. for that, right? With #julialang v1.12, we demonstrate it's possible to ahead of time compile to small binaries for use in controls applications. #sciml
arxiv.org/abs/2502.01128
arxiv.org/abs/2502.01128
Reposted
New fully adaptive Radau IIA method, achieves state-of-the-art performance for high accuracy on highly stiff ODEs. Fully automated order construction with adaptive order.
arxiv.org/abs/2412.14362 #julialang #sciml
arxiv.org/abs/2412.14362 #julialang #sciml
A Fully Adaptive Radau Method for the Efficient Solution of Stiff Ordinary Differential Equations at Low Tolerances
Radau IIA methods, specifically the adaptive order radau method in Fortran due to Hairer, are known to be state-of-the-art for the high-accuracy solution of highly stiff ordinary differential equation...
arxiv.org
December 20, 2024 at 2:38 AM
New fully adaptive Radau IIA method, achieves state-of-the-art performance for high accuracy on highly stiff ODEs. Fully automated order construction with adaptive order.
arxiv.org/abs/2412.14362 #julialang #sciml
arxiv.org/abs/2412.14362 #julialang #sciml
awful idea: CPU architecture where memory has Float32 addresses. 2^23 byes is pretty far to be byte addressable, and you would get up to 2^128 byes of RAM. what could possibly go wrong?
December 14, 2024 at 6:15 AM
awful idea: CPU architecture where memory has Float32 addresses. 2^23 byes is pretty far to be byte addressable, and you would get up to 2^128 byes of RAM. what could possibly go wrong?