Semiconductor Engineering
@semiengineering.bsky.social
Deep insights for the chip industry.
semiengineering.com
Hot topics: semiconductor, EDA, advanced packaging, hardware, low power, HPC, hardware security, automotive chips, embedded, edge computing, semiconductor manufacturing, chip design, VLSI
semiengineering.com
Hot topics: semiconductor, EDA, advanced packaging, hardware, low power, HPC, hardware security, automotive chips, embedded, edge computing, semiconductor manufacturing, chip design, VLSI
Four experts discuss why formal verification is becoming more important. Part 2 of a roundtable.
semiengineering.com/formal-verif...
#verification #EDA #semiconductor
semiengineering.com/formal-verif...
#verification #EDA #semiconductor
Formal Verification's Value Grows
But to increase adoption, formal tools have to lower barriers and make it possible for a wider group of people to be able to deploy successfully. LLMs may help.
semiengineering.com
November 10, 2025 at 4:22 PM
Four experts discuss why formal verification is becoming more important. Part 2 of a roundtable.
semiengineering.com/formal-verif...
#verification #EDA #semiconductor
semiengineering.com/formal-verif...
#verification #EDA #semiconductor
Reposted by Semiconductor Engineering
6 experts discuss how some AI workloads are better suited for on-device processing to achieve consistent performance, avoid network connectivity issues, reduce cloud computing costs, and ensure privacy.
semiengineering.com/moving-ai-wo...
#edge #AIworkloads #inference #EdgeAI #AI
semiengineering.com/moving-ai-wo...
#edge #AIworkloads #inference #EdgeAI #AI
Moving AI Workloads To The Edge
There are benefits and challenges of processing AI workloads on-device to enhance performance, reduce costs, and ensure data privacy.
semiengineering.com
November 8, 2025 at 5:35 PM
6 experts discuss how some AI workloads are better suited for on-device processing to achieve consistent performance, avoid network connectivity issues, reduce cloud computing costs, and ensure privacy.
semiengineering.com/moving-ai-wo...
#edge #AIworkloads #inference #EdgeAI #AI
semiengineering.com/moving-ai-wo...
#edge #AIworkloads #inference #EdgeAI #AI
It’s being called “China speed,” defined by the accelerated rate at which SDVs can be designed, manufactured & updated with new features. And nowhere is this hitting harder & forcing more profound changes than in Germany
semiengineering.com/how-fast-can...
#automotive #Germany #SDVs
semiengineering.com/how-fast-can...
#automotive #Germany #SDVs
How Fast Can Germany Shift To Software-Defined Vehicles?
Design, manufacturing, and business overhaul is beginning, but threat from low-cost, feature-rich vehicles from China continues to grow.
semiengineering.com
November 6, 2025 at 4:17 PM
It’s being called “China speed,” defined by the accelerated rate at which SDVs can be designed, manufactured & updated with new features. And nowhere is this hitting harder & forcing more profound changes than in Germany
semiengineering.com/how-fast-can...
#automotive #Germany #SDVs
semiengineering.com/how-fast-can...
#automotive #Germany #SDVs
Why and how the go-to-DRAM for low-power devices is pushing beyond its roots.
youtu.be/Gr3rWgMR5gw?...
#LPDDR6 #DRAM #HBM
youtu.be/Gr3rWgMR5gw?...
#LPDDR6 #DRAM #HBM
LPDDR6: Not Just For Mobile Anymore
YouTube video by Semiconductor Engineering
youtu.be
November 5, 2025 at 4:23 PM
Why and how the go-to-DRAM for low-power devices is pushing beyond its roots.
youtu.be/Gr3rWgMR5gw?...
#LPDDR6 #DRAM #HBM
youtu.be/Gr3rWgMR5gw?...
#LPDDR6 #DRAM #HBM
New technical papers recently added to Semiconductor Engineering’s library
semiengineering.com/chip-industr...
#semiconductor #MRAM #AI #processors #DRAM #chiplets #FeRAM
semiengineering.com/chip-industr...
#semiconductor #MRAM #AI #processors #DRAM #chiplets #FeRAM
November 4, 2025 at 4:21 PM
New technical papers recently added to Semiconductor Engineering’s library
semiengineering.com/chip-industr...
#semiconductor #MRAM #AI #processors #DRAM #chiplets #FeRAM
semiengineering.com/chip-industr...
#semiconductor #MRAM #AI #processors #DRAM #chiplets #FeRAM
The proliferation of edge AI will require fundamental changes in language models and chip architectures to make inferencing and learning outside of AI data centers a viable option.
semiengineering.com/small-vs-lar...
#edgeAI #SLMs
semiengineering.com/small-vs-lar...
#edgeAI #SLMs
November 3, 2025 at 4:40 PM
The proliferation of edge AI will require fundamental changes in language models and chip architectures to make inferencing and learning outside of AI data centers a viable option.
semiengineering.com/small-vs-lar...
#edgeAI #SLMs
semiengineering.com/small-vs-lar...
#edgeAI #SLMs
Semiconductor Engineering's latest 5 channel newsletters. Useful page to bookmark
semiengineering.com/insights-new...
#semiconductor
semiengineering.com/insights-new...
#semiconductor
November 3, 2025 at 12:51 AM
Semiconductor Engineering's latest 5 channel newsletters. Useful page to bookmark
semiengineering.com/insights-new...
#semiconductor
semiengineering.com/insights-new...
#semiconductor
Four industry experts discuss advances in formal verification tools and methodologies.
semiengineering.com/advances-in-...
#EDA #verification #semiconductor
semiengineering.com/advances-in-...
#EDA #verification #semiconductor
Advances In Formal Verification Technology
It's the only way to prove that a design is correct. Recent advances continue to make it better.
semiengineering.com
November 2, 2025 at 4:35 PM
Four industry experts discuss advances in formal verification tools and methodologies.
semiengineering.com/advances-in-...
#EDA #verification #semiconductor
semiengineering.com/advances-in-...
#EDA #verification #semiconductor
This multi-year survey collects and summarizes the current commercial accelerators that have been publicly announced with peak performance and peak power consumption numbers. semiengineering.com/mits-survey-...
MIT's Survey On Accelerators and Processors for Inference, With Peak Performance And Power Comparisons
A new technical paper titled “Lincoln AI Computing Survey (LAICS) and Trends” was published by researchers at MIT Lincoln Laboratory Supercomputing Center. Abstract “In the past year, generative AI (G...
semiengineering.com
November 1, 2025 at 5:26 PM
This multi-year survey collects and summarizes the current commercial accelerators that have been publicly announced with peak performance and peak power consumption numbers. semiengineering.com/mits-survey-...
The proliferation of AI tools seems perfectly matched to fill a talent shortage, but a closer look shows the skills do not entirely overlap. Certain parts of the EDA pipeline require human engineers, and it seems likely to stay that way for the foreseeable future.
semiengineering.com/even-with-ai...
semiengineering.com/even-with-ai...
Even With AI Inroads, Human Chip Designers Still Essential
Engineers are still needed at key points throughout the design pipeline.
semiengineering.com
October 30, 2025 at 3:35 PM
The proliferation of AI tools seems perfectly matched to fill a talent shortage, but a closer look shows the skills do not entirely overlap. Certain parts of the EDA pipeline require human engineers, and it seems likely to stay that way for the foreseeable future.
semiengineering.com/even-with-ai...
semiengineering.com/even-with-ai...
Multi-die assemblies are bringing together a variety of materials & processes with distinctly different physical properties, creating significant challenges in manufacturing & packaging that can impact yield at time zero & reliability in the field. semiengineering.com/ensuring-rel...
#semiconductor
#semiconductor
Ensuring Reliability Becomes Harder In Multi-Die Assemblies
Materials interactions over long-term use play an increasingly important role.
semiengineering.com
October 29, 2025 at 3:24 PM
Multi-die assemblies are bringing together a variety of materials & processes with distinctly different physical properties, creating significant challenges in manufacturing & packaging that can impact yield at time zero & reliability in the field. semiengineering.com/ensuring-rel...
#semiconductor
#semiconductor
What once was mainly associated with design exploration now spans the manufacturing lifecycle.
semiengineering.com/digital-twin...
#semiconductor
semiengineering.com/digital-twin...
#semiconductor
Digital Twins For Packaging: Bridging Design, Fab, Test, And Reliability
Packaging moves toward predictive control, but trust and validation still lag.
semiengineering.com
October 28, 2025 at 3:34 PM
What once was mainly associated with design exploration now spans the manufacturing lifecycle.
semiengineering.com/digital-twin...
#semiconductor
semiengineering.com/digital-twin...
#semiconductor
Steven Woo, fellow and distinguished inventor at Rambus, talks about latency under load, fill frequency, power issues, reliability, and cost considerations, and how all of these factors come together in HBM4 stacks.
semiengineering.com/critical-fac...
#HBM4 #HBM #DRAM #datacenter #AI
semiengineering.com/critical-fac...
#HBM4 #HBM #DRAM #datacenter #AI
Critical Factors For Storing Data In DRAM
New concerns and challenges for memory in AI data centers.
semiengineering.com
October 27, 2025 at 3:32 PM
Steven Woo, fellow and distinguished inventor at Rambus, talks about latency under load, fill frequency, power issues, reliability, and cost considerations, and how all of these factors come together in HBM4 stacks.
semiengineering.com/critical-fac...
#HBM4 #HBM #DRAM #datacenter #AI
semiengineering.com/critical-fac...
#HBM4 #HBM #DRAM #datacenter #AI
Physical AI holds the promise of making everything from robots to a slew of mobile edge devices much more interactive and useful, but it will significantly alter how systems are designed, verified, and monitored.
semiengineering.com/multiple-cha...
#physicalAI #robots #edge #verification #AI #EDA
semiengineering.com/multiple-cha...
#physicalAI #robots #edge #verification #AI #EDA
Multiple Challenges Emerge With Physical AI System Design
Workloads, system performance, and the need to continually learn and adapt are demolishing constraints that have made chip design and verification consistent and reliable.
semiengineering.com
October 22, 2025 at 3:36 PM
Physical AI holds the promise of making everything from robots to a slew of mobile edge devices much more interactive and useful, but it will significantly alter how systems are designed, verified, and monitored.
semiengineering.com/multiple-cha...
#physicalAI #robots #edge #verification #AI #EDA
semiengineering.com/multiple-cha...
#physicalAI #robots #edge #verification #AI #EDA
As part of the move to increase efficiency, power supply units are moving from the bottom trays to their own racks.
semiengineering.com/data-centers...
semiengineering.com/data-centers...
Data Centers Boost Voltage For Higher Efficiency
As part of the move to increase efficiency, power supply units are moving from the bottom trays to their own racks.
semiengineering.com
October 20, 2025 at 4:32 PM
As part of the move to increase efficiency, power supply units are moving from the bottom trays to their own racks.
semiengineering.com/data-centers...
semiengineering.com/data-centers...
Chip Industry Week in Review
semiengineering.com/chip-industr...
Germany’s IC strategy; Adv. packaging roadmap; GF’s auto chiplets; AI finds HW trojans w/97% accuracy; China’s EDA; high-NA EUV; TSMC, ASML, Samsung earnings; Silicon Valley events blitz; PDN problems and more..
#semiconductor
semiengineering.com/chip-industr...
Germany’s IC strategy; Adv. packaging roadmap; GF’s auto chiplets; AI finds HW trojans w/97% accuracy; China’s EDA; high-NA EUV; TSMC, ASML, Samsung earnings; Silicon Valley events blitz; PDN problems and more..
#semiconductor
October 17, 2025 at 3:22 PM
Chip Industry Week in Review
semiengineering.com/chip-industr...
Germany’s IC strategy; Adv. packaging roadmap; GF’s auto chiplets; AI finds HW trojans w/97% accuracy; China’s EDA; high-NA EUV; TSMC, ASML, Samsung earnings; Silicon Valley events blitz; PDN problems and more..
#semiconductor
semiengineering.com/chip-industr...
Germany’s IC strategy; Adv. packaging roadmap; GF’s auto chiplets; AI finds HW trojans w/97% accuracy; China’s EDA; high-NA EUV; TSMC, ASML, Samsung earnings; Silicon Valley events blitz; PDN problems and more..
#semiconductor
SemiEngineering's latest Special Report
semiengineering.com/current-prob...
#PDN #semiconductor #PowerDeliveryNetwork
semiengineering.com/current-prob...
#PDN #semiconductor #PowerDeliveryNetwork
Current Problems Grow For Power Delivery
Failure to get sufficient current to devices when they need it results in voltage droop, timing delays, and functional failures.
semiengineering.com
October 16, 2025 at 3:42 PM
SemiEngineering's latest Special Report
semiengineering.com/current-prob...
#PDN #semiconductor #PowerDeliveryNetwork
semiengineering.com/current-prob...
#PDN #semiconductor #PowerDeliveryNetwork
Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips:
An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. semiengineering.com/hybrid-appro...
#semiconductor #edgecomputing #cloud #inspection
An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. semiengineering.com/hybrid-appro...
#semiconductor #edgecomputing #cloud #inspection
Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips
Processing massive amounts of data needs to be balanced against quick adjustments in tools.
semiengineering.com
October 15, 2025 at 3:27 PM
Hybrid Approach Emerges For Edge/Cloud Inspection Of Chips:
An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. semiengineering.com/hybrid-appro...
#semiconductor #edgecomputing #cloud #inspection
An explosion in data from inspection images and metrology measurements is creating a confusing set of demands for chipmakers and their equipment vendors. semiengineering.com/hybrid-appro...
#semiconductor #edgecomputing #cloud #inspection
The SRC just released its Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap 2.0, an update to the industry’s first 3D semiconductor roadmap.
semiengineering.com/new-release-...
#semiconductor
semiengineering.com/new-release-...
#semiconductor
Microelectronics and Advanced Packaging Technologies Roadmap 2.0 (SRC)
The Semiconductor Research Corporation just released its Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap 2.0, a comprehensive update to the industry’s first 3D semiconductor roadma...
semiengineering.com
October 14, 2025 at 10:33 PM
The SRC just released its Microelectronics and Advanced Packaging Technologies (MAPT) Roadmap 2.0, an update to the industry’s first 3D semiconductor roadmap.
semiengineering.com/new-release-...
#semiconductor
semiengineering.com/new-release-...
#semiconductor
Special Report: When a good die fails test & gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs & masking problems
semiengineering.com/defeating-ov...
#semiconductor
semiengineering.com/defeating-ov...
#semiconductor
Metrology’s Growing Role In Reducing False Defects
Reducing nuisance defects requires tighter integration of inspection, test, and analytics.
semiengineering.com
October 14, 2025 at 3:36 PM
Special Report: When a good die fails test & gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs & masking problems
semiengineering.com/defeating-ov...
#semiconductor
semiengineering.com/defeating-ov...
#semiconductor